1. Field of the Invention
The present invention relates to a dielectric memory including a vertically stacked capacitor having a high dielectric constant material or a ferroelectric material and to a manufacturing method of such dielectric memory.
2. Description of the Prior Art
In a semiconductor memory having a high dielectric constant material or a ferroelectric material, for large-scale integration, a stacked memory cell is employed instead of a conventional planar memory cell. In such semiconductor memory, a thermal anneal is performed at a high temperature in an oxygen atmosphere in order to crystallize a dielectric film, which is a metal oxide. The thermal anneal oxidizes a contact plug provided under a capacitor. In order to prevent the oxidation of the contact plug in such semiconductor memory, an oxygen diffusion prevention layer is provided on the contact plug (see, for example, Japanese Patent No. 3681632 or Japanese Laid-Open Patent Publication No. 2000-124426).
FIG. 10 is a cross section illustrating a conventional dielectric memory including a vertically stacked capacitor. In this case, an example of a dielectric memory including a ferroelectric capacitor will be explained.
As shown in FIG. 10, the conventional dielectric memory includes a MOS transistor 506 on a semiconductor substrate 501, a ferroelectric capacitor 517 connected to one of impurity diffusion layers 505 of the MOS transistor 506, a contact plug 509, and an oxygen diffusion prevention layer 510 between the contact plug 509 and the ferroelectric capacitor 517.
The MOS transistor 506 includes a pair of impurity diffusion layers 505, a gate insulation film 503, and a gate electrode 504.
The ferroelectric capacitor 517 is provided in an opening 513 of a first ozone TEOS film 521 and includes a bottom electrode 514, a ferroelectric film 515, and a top electrode 516.
The conventional dielectric memory is manufactured through the following steps: forming a first ozone TEOS film 521 to cover an oxygen diffusion prevention layer 510; planarizing the first ozone TEOS film 521 by CMP; forming a bottom electrode 514 and a ferroelectric film 515; forming a conductive film, which is to be a top electrode 516 in an opening 513 to form a ferroelectric capacitor 517; forming a second ozone TEOS film 518 to cover the ferroelectric capacitor 517; planarizing the second ozone TEOS film 518 by CMP; and performing a thermal anneal at a high temperature in an oxygen atmosphere to crystallize a ferroelectric material forming the ferroelectric film.
In the conventional dielectric memory, an ozone TEOS film formed such that hydrogen is not produced in a formation process is provided on the oxygen diffusion prevention layer 510, and the bottom electrode 514 is embedded in the ozone TEOS film. In this structure, it is possible to prevent the reduction of the oxygen diffusion prevention layer 510 formed of, for example, a noble metal oxide. Moreover, the ferroelectric capacitor 517 is covered with the first ozone TEOS film 521 and the second ozone TEOS film 518. Therefore, the ferroelectric film 515 is not deteriorated by, for example, the reduction.